Surendra Rathod

Professor

5
active courses
1
removed courses
Apr 2020
first content date
Jun 2021
last content date
Surendra Rathod
1077
total students
125
total reviews
4.18
average rating
82
total content length

Courses

Randomization and IPC in SystemVerilog

Randomization and IPC in SystemVerilog

67
students
12.5 hours
content
Apr 2021
updated
$24.99
Functional Coverage and Assertions in SystemVerilog

Functional Coverage and Assertions in SystemVerilog

49
students
8.5 hours
content
Apr 2021
updated
$24.99
SystemVerilog using Object Oriented Programming

SystemVerilog using Object Oriented Programming

59
students
8.5 hours
content
Apr 2021
updated
$24.99
Fundamentals of Verification and System Verilog

Fundamentals of Verification and System Verilog

757
students
21.5 hours
content
Jul 2020
updated
$24.99
CMOS Digital VLSI Design Lab

CMOS Digital VLSI Design Lab

125
students
2 hours
content
May 2020
updated
$24.99

Related Topics

Law Enforcement
Functional Programming
SystemVerilog
Verilog HDL Programming
VLSI