VSD - Functional Verification Using Embedded-UVM - Part 2
Introduction to object-oriented programming
What you will learn
SoC design flow, role of Functional Verification
Logic Modeling, Introduction to Verilog
Concept of Hierarchy, Simulation-Time, and Concurrency in Hardware Modeling
Simulation Technology, Discrete Event Simulation
Verification Trends and Challenges
Concepts and Principles of Functional Verification
Testbench Architecture and Components
Lab – Tool Setup and Usage -- a simple DUT with traditional Verilog testbench will be provided with a Makefile to compile and simulate – Debug using waveforms
Why take this course?
🎓 Course Title: VSD - Functional Verification Using Embedded-UVM - Part 2: Introduction to Object-Oriented Programming
🚀 Course Headline: Dive into the World of VLSI Verification with "Hand-Crafted" Online Training by Kunal Ghosh!
Unlock the Secrets of VLSI Verification with Embedded-UVM 🌟
Are you ready to embark on a journey from the core principles of back-end development to the complexities of front-end design? Or perhaps you're simply curious about the intricate field of VLSI verification? Whether you're transitioning from hardware to software, or just looking to expand your technical horizons, this course is your gateway!
Why This Course?
This "hand-crafted" course is meticulously designed for learners at every level. It begins with the basics and gradually progresses towards advanced concepts in UVM (Universal Verification Methodology). The unique aspect of this course lies in its use of an open-source tool, which will be introduced in the labs of Part 2. This is the second part of a comprehensive series on Verification Sequential Design (VSD), where we focus on mastering Object-Oriented Programming (OOP) in the context of functional verification.
**🔍 What You Will Learn:
- Foundational Concepts: Gain a solid understanding of OOP principles, including classes, objects, inheritance, and polymorphism as they apply to VLSI verification.
- Embedded UVM Exploration: Explore the Embedded UVM framework, an open-source implementation of IEEE 1800.2 that serves as a robust platform for Functional Verification and SoC-FPGA based Emulation.
- Real-World Application: Learn from industry expert Puneet Goel, who has over two decades of experience in VLSI design and verification at top companies like STMicro, Motorola, Texas Instruments, and TranSwitch.
- Open-Source Mastery: Get hands-on experience with open-source tools that are essential for modern VLSI verification processes.
**🧐 About the Speaker:
- Puneet Goel is an esteemed Electronics Engineering graduate from Punjab Engineering College, Class of 1994.
- With an impressive 24 years in the VLSI industry, Puneet has made significant contributions to leading companies such as STMicro, Motorola, Texas Instruments, and TranSwitch.
- For the past 8 years, he has been a pivotal member of Coverify Systems Technology, where his focus has been on providing top-tier verification services and pioneering open-source solutions in chip verification.
- Puneet is the main architect behind Embedded UVM, an opensource implementation of IEEE 1800.2 that he developed to facilitate better verification practices in the industry.
Embark on your journey into the fascinating world of VLSI functional verification with this comprehensive course. Whether you're a seasoned professional or new to the field, this course will provide you with the knowledge and tools necessary to excel in the realm of embedded systems. Join us and transform your understanding of hardware verification through the power of Object-Oriented Programming with Embedded UVM! 🛠️👩💻👨💻
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